SSDs have a 'Bleak' Future, Researchers Say

As the circuitry of NAND flash-based, solid-state drives shrinks, performance drops precipitously -- meaning the technology could be doomed, according to new research.

By Lucas Mearian
Thu, February 16, 2012

Computerworld — As the circuitry of NAND flash-based, solid-state drives shrinks, performance drops precipitously -- meaning the technology could be doomed, according to new research.

Speaking to about 500 attendees at the 10th Usenix Conference on File and Storage Technologies here this week, Laura Grupp, a graduate student at the University of California, San Diego, said that as NAND flash densities increase, so do issues such as read and write latency and data errors.

While the density of SSDs grows and the cost per gigabyte shrinks, "everything else about them is poised to get worse," Grupp said.

"This makes the future of SSDs cloudy: While the growing capacity of SSDs and high IOP rates will make them attractive for many applications, the reduction in performance that is necessary to increase capacity while keeping costs in check may make it difficult for SSDs to scale as a viable technology for some applications," Grupp, lead author of the study, wrote in a research paper.

Grupp, along with Steven Swanson, director of UCSD's Non-Volatile Systems Laboratory, and John Davis of Microsoft Research, tested 45 different NAND flash chips that ranged in size from 72 nanometer (nm) circuitry to today's 25nm technology. The chips came from six vendors.

The tests revealed that the program speed (write speed) for pages in a flash block suffered dramatic and predictable variations in latency. And, as the NAND flash wore out, error rates also varied widely between devices. Single-level cell (SLC) NAND held up the best in the tests, while multi-level cell (MLC), and in particular, triple-level cell (TLC) NAND, produced the worst results.

The researchers took their empirical results and extrapolated them to the year 2024, when NAND flash development road maps show flash circuitry is expected to be only 6.5nm in size. At that time, read/write latency is expected to double in MLC flash and increase more than 2.5 times for TLC flash.

In addition, bit error rates increased by a factor of more than three, according to the researchers. "We can either have capacity or performance," Grupp said.

The researchers used PCIe-based flash cards with a channel speed of 400MBps based on the Open NAND Flash Interface (ONFI) specification and a standard 96 NAND flash dies, which is typical of SSDs.

The researchers did not use specialized NAND flash controllers as are used by SSD vendors such as Intel, OCZ or Fusion-io. Instead their results were baseline and considered "optimistic" because they didn't include latency added through error correction or garbage collection algorithms.

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Originally published on www.computerworld.com. Click here to read the original story.
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