IBM and partners announced this week another open standard under the umbrella of and analogous to OpenPOWER, which covers processor design. The new standard, OpenCAPI, addresses system interconnect \u2014 the links among various system elements at the core of high-performance computers. OpenCAPI specifies an improved, high-speed, reliable way for processors to connect with things like accelerators (graphics and others), advanced memory, networking and storage.\u00a0\n\n\nThe high-bandwidth, open interface design specifications can accommodate data rates up to 25 gigabits per second, beating handily the current standard interconnect, PCIe, which will be achieving only 16 gigabits per second in midyear 2017, when OpenCAPI products are expected to hit the market. IBM, which is contributing mightily to the specification on the technical side, cites the diminishing returns on Moore\u2019s Law, which delivered the greatest improvements in system performance until recently.\n\n\nWith slowing progress under Moore\u2019s Law, the best way to increase system performance, IBM asserts, is via interconnect improvements. Thus, OpenCAPI. Target applications include large enterprise datacenters and major cloud services.\n\n\nIBM comes to market with significant partners: AMD, Dell EMC, Google, HPE, Mellanox, Micron and Xilinx. Notably missing is Intel, which contributed the original technology to \u2014 and continues to champion \u2014 PCIe. Although PCIe has a performance roadmap that will improve over time, OpenCAPI starts out at a speed advantage it may be able to maintain.\n\n\nIBM expects to introduce its own OpenCAPI POWER9 servers in 2H17, and partners in OpenPOWER \u2014 among them Google with Rackspace, Mellanox, and Xilinx \u2014 will make their own introductions around the same time. Given AMD\u2019s involvement, x86 will also likely be in the mix.\n\n\nOpenCAPI is being built upon a base of existing IBM technology so as to get to market quickly. Among other features, the new interconnect will support the reliability, availability, and serviceability (RAS) functions required of mission-critical systems.\n\n\nIBM has already taken steps in the direction of OpenCAPI with NVLink, a point-to-point communications protocol designed to connect nVidia graphics processing units with IBM processors. The difference is that NVLink works only with nVidia products, and OpenCAPI will function with a wide variety of subsystems.\n\n\nHow far IBM and partners will get with this new architecture remains to be seen. However, early activity indicates that the largest customers, those most sensitive to performance, are already going for it. These customers are less about orthodoxy and more about what works best. They are often more rapid adopters of new technologies because they exist in highly competitive markets, and they have the technical chops to do the implementations.