Samsung Produces DDR2 with 80-Nanometer Process

Samsung Electronics has begun mass production of 512M-bit DDR (double data rate 2) DRAM (dynamic RAM) chips using an 80-nanometer production process, the company said Monday.

The 80-nanometer production process will allow Samsung to meet rising end-user demand for DDR2, the company said in a statement. When describing a production process, the number in nanometers refers to the size of the smallest feature that can be created on a chip.

The more advanced production process allows Samsung to reduce the die size of a chip, meaning more chips can be produced on a single silicon wafer. Die size refers to the area on silicon that a chip takes up. With more chips produced on a single wafer, the smaller die size means lower manufacturing costs for the DDR2 chips, which should translate into lower costs for end users.

Moving from one process to another often requires a costly investment in manufacturing equipment. However, Samsung said that wasn’t the case with this transition.

Samsung had previously used a 90-nanometer process to make the chips, and many of the features used in that process are also used in the 80-nanometer process, the company said. As a result, the shift in process technology required a “minimal” investment in new equipment, it said.

DDR2 is expected to become the mainstream memory used in PCs during the coming quarter, replacing DDR memory, according to DRAMexchange Technology, which runs an online clearinghouse for memory chips.

-Sumner Lemon, IDG News Service

For related coverage, read AMD Boosts Opteron Speed With New Chips and IBM to Produce Smaller, More Powerful Chips.

Keep checking in at our CIO News Alerts page for updated news coverage.