by CIO Staff

AMD Reveals Torrenza Socket Compatibility Plans

Sep 22, 20062 mins
Data Center

Advanced Micro Devices (AMD) has released further details of its Torrenza project, which will one day allow server manufacturers to optimize servers for specific tasks by placing accelerator chips right on the motherboard.

Since unveiling Torrenza in June, AMD has been working on the specifications of a new physical interface that chip manufacturers can use to develop custom accelerator chips that will plug into a server motherboard, alongside or in place of an AMD processor, said Doug O’Flaherty, AMD’s divisional manager for acceleration strategy.

That interface, the Torrenza Innovation Socket, will use the same 1207-pin Revision F socket that AMD is using for its latest generation of Opteron chips, and will communicate with the main processor using a HyperTransport connection, O’Flaherty said.

HyperTransport is a specification for high-speed communications between chips or circuit boards, proposed by AMD and now managed by the HyperTransport Consortium.

AMD also announced that the project had won the support of six server manufacturers: Cray, Dell, Fujitsu-Siemens Computers, Hewlett-Packard, IBM and Sun Microsystems.

“We have exposed our road map in great detail to [equipment manufacturers],” O’Flaherty said. “We are expecting some of the first pieces of the platform in the latter half of 2007.”

Server manufacturers could use the interface to add chips to speed up the processing of XML (Extensible Markup Language) or floating-point calculations, or even to improve gaming performance with a physics accelerator, said Giuseppe Amato, AMD’s technical director sales and marketing for Europe.

Such accelerators are already available for some applications as add-in PCI Express cards, he said. Manufacturers of accelerator chips will be able to improve their performance further by moving them closer to the main processor and connecting them via the Torrenza Innovation Socket. “It’s close to PCI Express. The physical layer changes, but the protocol is PCI Express,” he said.

-Peter Sayer, IDG News Service (Paris Bureau)

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