Chartered of Singapore, Samsung Electronics, based in South Korea, and the United States’ IBM plan to start mass production of their 45-nanometer, next-generation chips by the end of next year, and they’ll be manufactured at the companies’ 300-millimeter wafer-fabrication facilities, Reuters reports.
The chips will be put to use in upcoming communications applications, and they were developed by all three firms, as well as Germany’s Infineon Technologies, according to Reuters.
A chip’s performance power is based on the number of transistors squeezed onto its surface, and the distance between those transistors is measured in nanometers, or billionths of one meter, Reuters reports. The more transistors packed onto a chip, the smaller the gap between them. Chips with higher peak performance levels go for higher prices than their counterparts with fewer transistors, according to Reuters.
Hermann Eul, president of Infineon’s Communications Solutions business, said in a release, “The first structures in 45nm represent our most cutting-edge technology, bringing together high-performance capabilities and low power consumption,” according to Reuters.
In related news, Samsung this week announced that it started commercial production of 1-gigabit double data rate 2 DRAM memory chips with a process that enables it to make the chips smaller and for less money.
Last week, Infineon said it has been selected to provide chips for the upcoming U.S. electronic passports, or e-passports—15 million of which are to be issued by the Department of State by year’s end.
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