by CIO Staff

IBM Speeds Chips With DRAM Memory

Feb 14, 20073 mins
Computers and Peripherals

In an upgrade that could improve chip performance for gamers and multimedia users, IBM plans to double the performance of its microprocessors in 2008 by using smaller, more efficient memory, according to a paper presented at the International Solid State Circuits Conference trade show in San Francisco Wednesday.

IBM plans to use dynamic RAM (DRAM) instead of static RAM (SRAM) as the embedded memory cache built onto each chip. The change will allow each chip to store its data in one-third the area and use one-fifth the electricity for standby power, said Subramanian Iyer, director of 45-nanometer technology development at IBM.

The approach will vastly improve chip performance for multicore processors and for applications that need to move large amounts of graphic data, such as gaming, networking and image-intensive multimedia, he said. IBM is already using the new embedded DRAM (eDRAM) in 65-nanometer prototype chips, and plans to roll it out commercially by 2008 for its entire range of 45-nanometer chips, including its Power line.

The technology could have a big impact on consumer electronics, since IBM supplies chips for all three of the top gaming consoles: Sony Computer Entertainment’s PlayStation 3, Nintendo’s Wii and Microsoft’s Xbox 360.

A typical commercial microprocessor like Intel’s Core 2 Duo devotes 60 percent of its surface area to memory, Iyer said. Replacing that with eDRAM cells taking up just one-third as much space will allow chip designers to build smaller chips and reduce the “run lengths,” the length of wire that data must travel as it commutes around the chip, said John Barth, senior technology staff member and chief of eDRAM architecture for IBM.

IBM has used embedded DRAM in its chips for the BlueGene supercomputer, but those PowerPC processors use moderately performing, bulk-technology DRAM, which is far slower than SRAM. To create the new design, IBM will add a high-speed type of DRAM to its current silicon-on-insulator architecture.

“This DRAM now is almost as fast as SRAM. It may not be as fast at the micro level, but when you get down to 45-nm, it will be faster at the system level. It’s going to just blow the doors off,” Barth said. “A typical microprocessor takes 14 clock cycles to get data from its cache. Using DRAM slows that down, but only one clock [cycle]. By doubling the amount of memory on the die, we can get double-digit percentage gains at the system level.”

The advance comes at the same time that several other chip vendors are seeking better ways to move large quantities of graphics data. Advanced Micro Devices even acquired graphics card maker ATI in 2006, and now plans to combine its graphics power with AMD’s processing chips in a single chip called Fusion. That challenge was compounded in February, since Microsoft’s new Vista OS has a graphics-intensive interface that demands increased PC storage space, faster processors and even separate graphics cards or coprocessors.

Ben Ames, IDG News Service (Boston Bureau)

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